By Myke Predko
The sphere of educating electronic electronics has no longer replaced considerably some time past twenty years. the various related books that first turned to be had within the overdue Nineteen Seventies and early Eighties are nonetheless getting used as easy texts. within the 20+ years due to the fact that those have been written, the fundamental principles haven't replaced, yet they don't supply robust hyperlinks to trendy electronics together with CMOS common sense, Programmable good judgment units and microprocessor/microcontroller interfacing. classes instructing introductory electronic electronics will fill within the lacking components of knowledge for college kids, yet neither the teachers nor scholars have assets to provide an explanation for smooth know-how and interfaces. One assumption made by means of the entire ordinary texts is that experimenting with electronic electronics can't be performed simply - within the proposed publication, "digital guru" Myke Predko will exhibit how readers can organize their very own gear for experimenting with electronic electronics for only $10.
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Additional info for Digital Electronics Demystified: A Self-Teaching Guide
1-17 are samples of what you will see when you are designing your own application circuit. Fig. 1-17. Digital waveforms. 23 PART ONE Intro to Digital Electronics 24 Fig. 1-18. Digital waveforms of Fig. 1-8 example combinatorial logic circuit. The waveform diagram is the ﬁrst tool that will help you optimize your circuit. Before writing up this section, I was planning on the diagrams I wanted to include with it and one was a waveform representation of the ﬁrst example combinatorial logic circuit’s operation from Table 1-9.
Commonalities. When you do this, don’t worry about ‘‘loosing data’’; the important bit patterns are still saved in the active bit patterns. Table 2-6 shows what happens when the second don’t care bit is indicated. Since the two events which ‘‘Sound Alarm’’ do not have common don’t care bits, we can’t repeat this process any more. W2Þ þ ðP Á W2Þ This optimized ‘‘Alarm State’’ truth table has reduced our component count to one NOT gate, two AND gates and one OR gate and executes in ﬁve gate delays – quite an improvement from the original 43 gates and 11 gate delays!
XOR gate built from sum of products equation and converted to NAND gates. counts as three ‘‘gate delays’’. This is an example of what I call ‘‘technology optimization’’: the logic circuit has been reduced to its bare minimum, taking advantage of the operation of the basic logic gates that make up the technology that it is implemented in. Before moving on, I want to take one more look at the home alarm circuit that has been discussed throughout this chapter. I made a pretty bold statement at the start of the chapter, saying that it could be reduced to ﬁt into the most basic TTL chip available – let’s see how honest I was being.